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Erratum to: Folded down-conversion mixer for a 60 GHz receiver architecture in 65-nm CMOS technologyIn: Frontiers of Information Technology & Electronic Engineering, Jg. 16 (2015-05-01), S. 428-428Online unknownZugriff:
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In: Frontiers of Information Technology & Electronic Engineering, Jg. 22 (2020-07-20), S. 262-271Online unknownZugriff:
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In: Frontiers of Information Technology & Electronic Engineering, Jg. 20 (2019-08-15), S. 1578-1586Online unknownZugriff:
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In: Frontiers of Information Technology & Electronic Engineering, Jg. 20 (2019-04-01), S. 458-471Online unknownZugriff:
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In: Frontiers of Information Technology & Electronic Engineering, Jg. 19 (2018-02-01), S. 285-296Online unknownZugriff:
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In: Frontiers of Information Technology & Electronic Engineering, Jg. 18 (2017-05-01), S. 729-737Online unknownZugriff:
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In: Frontiers of Information Technology & Electronic Engineering, Jg. 17 (2016-03-01), S. 258-264Online unknownZugriff:
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In: Frontiers of Information Technology & Electronic Engineering, Jg. 16 (2015-12-01), S. 1018-1033Online unknownZugriff:
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In: Frontiers of Information Technology & Electronic Engineering, Jg. 16 (2015-08-01), S. 700-706Online unknownZugriff: