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23 Treffer

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  1. Detailansicht für Treffer 1 öffnen
    Development of fast CMOS sensors adapted to an ILC vertex detector operated at room temperature
    Winter, M. ; Dzahini, Daniel ; et al.
    In: Pramana : Journal of Physics ; Linear Collider Workshop (LCWS06) ; https://hal.in2p3.fr/in2p3-00186574 ; Linear Collider Workshop (LCWS06), Mar 2006, Bangalore, India, 2006
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  2. Detailansicht für Treffer 2 öffnen
    Development of fast CMOS sensors adapted to an ILC vertex detector operated at room temperature
    Winter, M. ; Dzahini, Daniel ; et al.
    In: Pramana : Journal of Physics ; Linear Collider Workshop (LCWS06) ; https://hal.in2p3.fr/in2p3-00186574 ; Linear Collider Workshop (LCWS06), Mar 2006, Bangalore, India, 2006
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  3. Detailansicht für Treffer 3 öffnen
    Development of fast CMOS sensors adapted to an ILC vertex detector operated at room temperature
    Winter, M. ; Dzahini, Daniel ; et al.
    In: Pramana : Journal of Physics ; Linear Collider Workshop (LCWS06) ; http://hal.in2p3.fr/in2p3-00186574 ; Linear Collider Workshop (LCWS06), Mar 2006, Bangalore, India, 2006
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  4. Detailansicht für Treffer 4 öffnen
    SAGA: the first general-purpose on-line arithmetic co-processor
    Skaf, A. ; Guyot, A. ; et al.
    In: Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802. ; https://hal.science/hal-00014930 ; Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802., 1995, New Delhi, India. pp.146-9, ⟨10.1109/ICVD.1995.512094⟩, 1995
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  5. Detailansicht für Treffer 5 öffnen
    SAGA: the first general-purpose on-line arithmetic co-processor
    Skaf, A. ; Guyot, A. ; et al.
    In: Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802. ; https://hal.archives-ouvertes.fr/hal-00014930 ; Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802., 1995, New Delhi, India. pp.146-9, ⟨10.1109/ICVD.1995.512094⟩, 1995
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  6. Detailansicht für Treffer 6 öffnen
    Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs
    O'Connor, Ian ; Hassoune, Ilham ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://hal.inria.fr/hal-01054269 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.97-113, ⟨10.1007/978-3-642-12267-5_6⟩, 2008
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  7. Detailansicht für Treffer 7 öffnen
    Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs
    O'Connor, Ian ; Hassoune, Ilham ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://inria.hal.science/hal-01054269 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.97-113, ⟨10.1007/978-3-642-12267-5_6⟩, 2008
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  8. Detailansicht für Treffer 8 öffnen
    Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs
    O'Connor, Ian ; Hassoune, Ilham ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://hal.inria.fr/hal-01054269 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.97-113, ⟨10.1007/978-3-642-12267-5_6⟩, 2008
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  9. Detailansicht für Treffer 9 öffnen
    Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs
    O'Connor, Ian ; Hassoune, Ilham ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://hal.inria.fr/hal-01054269 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.97-113, ⟨10.1007/978-3-642-12267-5_6⟩, 2008
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  10. Detailansicht für Treffer 10 öffnen
    Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs
    O'Connor, Ian ; Hassoune, Ilham ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://hal.inria.fr/hal-01054269 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.97-113, ⟨10.1007/978-3-642-12267-5_6⟩, 2008
    Online Konferenz
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  11. Detailansicht für Treffer 11 öffnen
    Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs
    O'Connor, Ian ; Hassoune, Ilham ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://inria.hal.science/hal-01054269 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.97-113, ⟨10.1007/978-3-642-12267-5_6⟩, 2008
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  12. Detailansicht für Treffer 12 öffnen
    On-chip testing of embedded transducers
    Mir, Salvador ; Rufer, Libor ; et al.
    In: Proceedings 17th International Conference on VLSI Design ; Proceedings.-17th-International-Conference-on-VLSI-Design. ; https://hal.science/hal-00012862 ; Proceedings.-17th-International-Conference-on-VLSI-Design., 2004, Mumbai, India. pp.463-72, ⟨10.1109/ICVD.2004.1260965⟩, 2004
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  13. Detailansicht für Treffer 13 öffnen
    On-chip testing of embedded transducers
    Mir, Salvador ; Rufer, Libor ; et al.
    In: Proceedings 17th International Conference on VLSI Design ; Proceedings.-17th-International-Conference-on-VLSI-Design. ; https://hal.archives-ouvertes.fr/hal-00012862 ; Proceedings.-17th-International-Conference-on-VLSI-Design., 2004, Mumbai, India. pp.463-72, ⟨10.1109/ICVD.2004.1260965⟩, 2004
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  14. Detailansicht für Treffer 14 öffnen
    CASHIER: A Cache Energy Saving Technique for QoS Systems
    Mittal, Sparsh ; Zhang, Zhao ; et al.
    In: 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems (VLSID) ; https://hal.archives-ouvertes.fr/hal-01107528 ; 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems (VLSID), Jan 2013, Pune, India. pp.43 - 48, ⟨10.1109/VLSID.2013.160⟩, 2013
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  15. Detailansicht für Treffer 15 öffnen
    A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits
    Tran, Ahn Duc ; Virazel, Arnaud ; et al.
    In: ATS 2011 - 20th IEEE Asian Test Symposium ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-00651238 ; ATS 2011 - 20th IEEE Asian Test Symposium, Nov 2011, New Delhi, India. pp.136-141, ⟨10.1109/ATS.2011.89⟩, 2011
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  16. Detailansicht für Treffer 16 öffnen
    A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits
    Tran, Ahn Duc ; Virazel, Arnaud ; et al.
    In: ATS 2011 - 20th IEEE Asian Test Symposium ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-00651238 ; ATS 2011 - 20th IEEE Asian Test Symposium, Nov 2011, New Delhi, India. pp.136-141, ⟨10.1109/ATS.2011.89⟩, 2011
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  17. Detailansicht für Treffer 17 öffnen
    Comparison of Two Autonomous AC-DC Converters for Piezoelectric Energy Scavenging Systems
    Dallago, Enrico ; Miatton, Daniele ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://hal.inria.fr/hal-01054270 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.61-80, ⟨10.1007/978-3-642-12267-5_4⟩, 2008
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  18. Detailansicht für Treffer 18 öffnen
    Time Efficient Dual-Field Unit for Cryptography-Related Processing
    Cilardo, Alessandro ; Mazzocca, Nicola ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://hal.inria.fr/hal-01054277 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.191-210, ⟨10.1007/978-3-642-12267-5_11⟩, 2008
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  19. Detailansicht für Treffer 19 öffnen
    Comparison of Two Autonomous AC-DC Converters for Piezoelectric Energy Scavenging Systems
    Dallago, Enrico ; Miatton, Daniele ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://hal.inria.fr/hal-01054270 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.61-80, ⟨10.1007/978-3-642-12267-5_4⟩, 2008
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    Volltext
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  20. Detailansicht für Treffer 20 öffnen
    Time Efficient Dual-Field Unit for Cryptography-Related Processing
    Cilardo, Alessandro ; Mazzocca, Nicola ; et al.
    In: IFIP Advances in Information and Communication Technology ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ; https://hal.inria.fr/hal-01054277 ; 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.191-210, ⟨10.1007/978-3-642-12267-5_11⟩, 2008
    Online Konferenz
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    Volltext
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