Optimization of Photodiode Design Through Analysis of Full-Well Capacity and Image Lag in 0.5 μ m CMOS Image Sensors With Vertical Transfer Gates.
In: IEEE Electron Device Letters, Jg. 43 (2022-10-01), Heft 10, S. 1697-1700
Online
academicJournal
Zugriff:
Titel: |
Optimization of Photodiode Design Through Analysis of Full-Well Capacity and Image Lag in 0.5 μ m CMOS Image Sensors With Vertical Transfer Gates.
|
---|---|
Autor/in / Beteiligte Person: | Park, Jae Hyeon ; Suk, Chan Hee ; Kim, Sungchul ; Kim, Jae Ho ; Kwon, Uihui ; Kim, Dae Sin ; Yoo, Keon-Ho ; Kim, Tae Whan |
Link: | |
Zeitschrift: | IEEE Electron Device Letters, Jg. 43 (2022-10-01), Heft 10, S. 1697-1700 |
Veröffentlichung: | 2022 |
Medientyp: | academicJournal |
ISSN: | 0741-3106 (print) |
DOI: | 10.1109/LED.2022.3201138 |
Sonstiges: |
|