Single InAs/GaSb NanowireLow-Power CMOS Inverter.
In: Nano Letters, Jg. 12 (2012-11-14), Heft 11, S. 5593-5597
academicJournal
Zugriff:
III–V semiconductors have so far predominatelybeen employedfor n-type transistors in high-frequency applications. This developmentis based on the advantageous transport properties and the large varietyof heterostructure combinations in the family of III–V semiconductors.In contrast, reports on p-type devices with high hole mobility suitablefor complementary metal–oxide–semiconductor (CMOS) circuitsfor low-power operation are scarce. In addition, the difficulty tointegrate both n- and p-type devices on the same substrate withoutthe use of complex buffer layers has hampered the development of III–Vbased digital logic. Here, inverters fabricated from single n-InAs/p-GaSbheterostructure nanowires are demonstrated in a simple processingscheme. Using undoped segments and aggressively scaled high-κdielectric, enhancement mode operation suitable for digital logicis obtained for both types of transistors. State-of-the-art on- andoff-state characteristics are obtained and the individual long-channeln- and p-type transistors exhibit minimum subthreshold swings of SS= 98 mV/dec and SS = 400 mV/dec, respectively, at Vds= 0.5 V. Inverter characteristicsdisplay a full signal swing and maximum gain of 10.5 with a smalldevice-to-device variability. Complete inversion is measured at lowfrequencies although large parasitic capacitances deform the waveformat higher frequencies. [ABSTRACT FROM AUTHOR]
Titel: |
Single InAs/GaSb NanowireLow-Power CMOS Inverter.
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Autor/in / Beteiligte Person: | Dey, Anil W. ; Svensson, Johannes ; Borg, B. Mattias ; Ek, Martin ; Wernersson, Lars-Erik |
Zeitschrift: | Nano Letters, Jg. 12 (2012-11-14), Heft 11, S. 5593-5597 |
Veröffentlichung: | 2012 |
Medientyp: | academicJournal |
ISSN: | 1530-6984 (print) |
DOI: | 10.1021/nl302658y |
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