CMOS First-Order All-Pass Filter With 2-Hz Pole Frequency.
In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Jg. 27 (2019-02-01), Heft 2, S. 294-303
Online
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Zugriff:
A CMOS fully integrated all-pass filter with an extremely low pole frequency of 2 Hz is introduced in this paper. It has 0.08-dB passband ripple and 0.029-mm2Si area. It has 0.38-mW power consumption in strong inversion with ±0.6-V power supplies. In subthreshold, it has 0.64- $\mu \text{W}$ quiescent power and operates with ±200-mV dc supplies. Miller multiplication is used to obtain a large equivalent capacitor without excessive Si area. By varying the gain of the Miller amplifier, the pole frequency can be varied from 2 to 48 Hz. Experimental and simulation results of a test chip prototype in 130-nm CMOS technology validate the proposed circuit. [ABSTRACT FROM AUTHOR]
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Titel: |
CMOS First-Order All-Pass Filter With 2-Hz Pole Frequency.
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Autor/in / Beteiligte Person: | Paul, Anindita ; Ramirez-Angulo, Jaime ; Lopez-Martin, Antonio ; Gonzalez Carvajal, Ramon |
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Zeitschrift: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Jg. 27 (2019-02-01), Heft 2, S. 294-303 |
Veröffentlichung: | 2019 |
Medientyp: | academicJournal |
ISSN: | 1063-8210 (print) |
DOI: | 10.1109/TVLSI.2018.2878017 |
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