Analysis and Design of a Low-Voltage, Low-Power, High-Precision, Class-AB Current-Mode Subthreshold CMOS Sample and Hold Circuit.
In: IEEE Transactions on Circuits & Systems. Part I: Regular Papers, Jg. 58 (2011-07-01), Heft 7, S. 1615-1626
Online
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Zugriff:
This paper proposes the design of a current-mode sample and hold circuit using subthreshold MOSFETs. The proposed circuit combines negative feedback and the compressive I-V characteristic of a class-AB weak inversion transconductor to achieve low switching error, high signal-to-noise ratio and high dynamic range from a low supply voltage and very low current consumption. The paper also provides a feedback analysis of current mode sample and hold circuits. Several design issues including circuit stability, mismatch, linearity, noise, and power consumption are discussed and a comparison of class-A and class-AB versions of subthreshold sample and hold circuits is made. The design verification of the proposed class-AB current mode sample and hold circuit is done by circuit simulations using 0.13 \mu \m CMOS model parameters. The results show that, from a 0.6 V supply and with a power consumption of 27.5 nW, the proposed circuit provides 73 dB signal-to-noise ratio, 77 dB dynamic range, and a figure of merit of 1.9 nW/MHz. [ABSTRACT FROM PUBLISHER]
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Titel: |
Analysis and Design of a Low-Voltage, Low-Power, High-Precision, Class-AB Current-Mode Subthreshold CMOS Sample and Hold Circuit.
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Autor/in / Beteiligte Person: | Sawigun, Chutham ; Serdijn, Wouter A. |
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Zeitschrift: | IEEE Transactions on Circuits & Systems. Part I: Regular Papers, Jg. 58 (2011-07-01), Heft 7, S. 1615-1626 |
Veröffentlichung: | 2011 |
Medientyp: | serialPeriodical |
ISSN: | 1549-8328 (print) |
DOI: | 10.1109/TCSI.2011.2158491 |
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