Vertically Integrated CMOS Ternary Logic Device with Low Static Power Consumption and High Packing Density.
In: ACS Applied Materials & Interfaces, Jg. 15 (2023-11-08), Heft 44, S. 51429-51434
academicJournal
Zugriff:
Titel: |
Vertically Integrated CMOS Ternary Logic Device with Low Static Power Consumption and High Packing Density.
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Autor/in / Beteiligte Person: | Han, Joon-Kyu ; Lee, Jung-Woo ; Kim, Young Bin ; Yun, Seong-Yun ; Yu, Ji-Man ; Lee, Keon Jae ; Choi, Yang-Kyu |
Zeitschrift: | ACS Applied Materials & Interfaces, Jg. 15 (2023-11-08), Heft 44, S. 51429-51434 |
Veröffentlichung: | 2023 |
Medientyp: | academicJournal |
ISSN: | 1944-8244 (print) |
DOI: | 10.1021/acsami.3c13296 |
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