Characterization and Modeling of 14-/16-nm FinFET-Based LDMOS
In: IEEE Transactions on Electron Devices, Jg. 71 (2024), Heft 1, S. 62-69
Online
serialPeriodical
Zugriff:
Due to the significant advancement of system-on-chip (SoC) based architectures in IC technology, FinFET-based laterally diffused MOS (LDMOS) FETs are crucial for integrating high-voltage (HV) devices with low-voltage (LV) FinFET-based digital systems. We have performed on-wafer characterization of the state-of-the-art production level 14-/16-nm FinFET-based LDMOS devices. Industry-standard FinFET’s compact model Berkeley short-channel IGFET model-common multigate (BSIM-CMG) 111.1.0 cannot model the electrical characteristics of these devices accurately. We have developed a physics-based compact model for the overlap charge and voltage-dependent resistance of the drift region. The proposed model has been implemented in Verilog-A and added to the existing BSIM-CMG model. The improved BSIM-CMG model shows excellent agreement with the experimental data for the transcapacitances, current, and its derivatives. To the best of our knowledge, this is the first charge-based compact model presented for multigate LDMOS devices.
Titel: |
Characterization and Modeling of 14-/16-nm FinFET-Based LDMOS
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Autor/in / Beteiligte Person: | Kar, Anirban ; Parihar, Shivendra Singh ; Huang, Jun Z. ; Zhang, Huilong ; Wang, Weike ; Imura, Kimihiko ; Chauhan, Yogesh Singh |
Link: | |
Zeitschrift: | IEEE Transactions on Electron Devices, Jg. 71 (2024), Heft 1, S. 62-69 |
Veröffentlichung: | 2024 |
Medientyp: | serialPeriodical |
ISSN: | 0018-9383 (print) ; 1557-9646 (print) |
DOI: | 10.1109/TED.2023.3262613 |
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