Toward Monolithically Integrated Hybrid CMOS-NEM Circuits
In: IEEE Transactions on Electron Devices, Jg. 68 (2021-12-01), S. 6430-6436
Online
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Zugriff:
Nanoelectromechanical (NEM) switches offer the advantages of zero off-state leakage current, abrupt switching characteristics, nonvolatile (NV) operation, and relatively low on-state resistance as compared with CMOS transistors predominantly used for digital computing today. NEM switches can be implemented using metallic interconnect layers formed in the back-end-of-line (BEOL) steps of a standard CMOS IC manufacturing process, in order to enable compact implementation of hybrid CMOS-NEM circuits. In this article, a release-etch method is developed for realizing BEOL NV-NEM switches with leq100-nm contact gaps. A functional array of BEOL NV-NEM switches is used to implement a hybrid CMOS-NEM IC for data search applications. NV-NEM switch design optimization to minimize the programming voltage and accelerate switching speed is discussed. A scaled NV-NEM technology is projected to be advantageous for high-speed, low-power reconfigurable computing applications. This projection is validated with experimental data for a BEOL NV-NEM switch implemented with a conventional 16-nm CMOS IC manufacturing process.
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Toward Monolithically Integrated Hybrid CMOS-NEM Circuits
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Autor/in / Beteiligte Person: | Horace-Herron, Kelsey ; Usai, Giulia ; Sikder, Urmita ; Stojanovic, Vladimir ; Liu, Tiehui ; Hutin, Louis ; Yen, Ting-Ta |
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Zeitschrift: | IEEE Transactions on Electron Devices, Jg. 68 (2021-12-01), S. 6430-6436 |
Veröffentlichung: | Institute of Electrical and Electronics Engineers (IEEE), 2021 |
Medientyp: | unknown |
ISSN: | 1557-9646 (print) ; 0018-9383 (print) |
DOI: | 10.1109/ted.2021.3122404 |
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