Compact Layout of DT-MOS Transistor With Source-Follower Subcircuit in 90-nm CMOS Technology
In: IEEE Electron Device Letters, Jg. 29 (2008-04-01), S. 392-395
Online
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Zugriff:
This letter proposes a compact layout of the dynamic threshold-voltage MOS (DT-MOS) transistor using foundry 90-nm CMOS technology. Adopting the subcircuit of source follower, the proposed DT-MOS transistor could be operated at voltage as low as 0.7 V. Measurement results demonstrate the 80% improvement of current drive capability and the 60% improvement of transconductance compared to traditional devices. This letter demonstrates an excellent device with compact layout for low-voltage operation by using nanometer CMOS technology.
Titel: |
Compact Layout of DT-MOS Transistor With Source-Follower Subcircuit in 90-nm CMOS Technology
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Autor/in / Beteiligte Person: | Hsu, Heng-Ming ; Lee, Tai-Hsing |
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Zeitschrift: | IEEE Electron Device Letters, Jg. 29 (2008-04-01), S. 392-395 |
Veröffentlichung: | Institute of Electrical and Electronics Engineers (IEEE), 2008 |
Medientyp: | unknown |
ISSN: | 1558-0563 (print) ; 0741-3106 (print) |
DOI: | 10.1109/led.2008.918255 |
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