Notice of Violation of IEEE Publication Principles: 9.75/10.6GHz SiGe PLL for LNB Satellite Front-Ends Using Half-Rate Oscillators
In: 2006 Symposium on VLSI Circuits, 2006. Digest of Technical, 2006
Online
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Zugriff:
A fully-integrated frequency synthesizer for DBS satellite front-ends was realized in a low cost 50GHz fT SiGe process. Two half-rate VCOs followed by Gilbert frequency doublers generate the 9.75/10.6 GHz LO signals with lower phase noise than a full-rate oscillator. The loop filter was integrated on-chip by using a passive feed-forward architecture, which provides a noiseless resistor multiplication
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Notice of Violation of IEEE Publication Principles: 9.75/10.6GHz SiGe PLL for LNB Satellite Front-Ends Using Half-Rate Oscillators
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Autor/in / Beteiligte Person: | Maxim, A. ; Gheorghe, M. ; Turinici, C. |
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Zeitschrift: | 2006 Symposium on VLSI Circuits, 2006. Digest of Technical, 2006 |
Veröffentlichung: | IEEE, 2006 |
Medientyp: | unknown |
DOI: | 10.1109/vlsic.2006.1705302 |
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