64Mb mobile stacked single-crystal Si SRAM (S/sup 3/RAM) with selective dual pumping scheme (SDPS) and multi cell burn-in scheme (MCBS) for high density and low power SRAM
In: 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525), 2004-10-26
Online
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Zugriff:
A 64Mb Mobile S/sup 3/RAM was designed with stacked single-crystal thin film transistor (SSTFT) cell using 80nm SRAM technology to overcome chip size penalty of conventional 6T-SRAM with improved performance. For 1.3V operation, word line (WL) and cell Vcc were pumped simultaneously using selective dual pumping scheme (SDPS). Access time of 49.2ns was achieved at 1.3V supply voltage. Multi cell burn-in scheme (MCBS) and standby current (ISB1) repair scheme enhanced the yield for the high density products.
| Titel: |
64Mb mobile stacked single-crystal Si SRAM (S/sup 3/RAM) with selective dual pumping scheme (SDPS) and multi cell burn-in scheme (MCBS) for high density and low power SRAM
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| Autor/in / Beteiligte Person: | Lim, Bo-Tak ; Son, Jong-Pil ; An, Hung-Jun ; Kim, Kyung-Hee ; Mo, Hyun-Sun ; Han, Gong-Heum ; Nam, Hyou-Youn ; Park, Joon-Min ; Byun, Hyun-Geun ; Kim, Su-Yeon ; Kwak, Choong-keun ; Kang, Sang-beom |
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| Zeitschrift: | 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525), 2004-10-26 |
| Veröffentlichung: | Widerkehr and Associates, 2004 |
| Medientyp: | unknown |
| DOI: | 10.1109/vlsic.2004.1346588 |
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