Low-power analogue computational blocks based on high-performance floating-gate MOSFET resistor
In: International Journal of Electronics, Jg. 106 (2019-01-11), S. 663-678
Online
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Zugriff:
This article proposes a new FGMOS-based programmable FGMOS resistor. A highly linear resistor is implemented by cancelling the non-term present in the drain current equation of MOSFET operating in the linear region. The inherited features of FGMOS resistor are simplicity, programmability, wider bandwidth and very low power dissipation without supply voltage. The power dissipation of the proposed FGMOS resistor is only 985 nW. Analogue computational blocks such as programmable reciprocal circuit, current to voltage converter and low-pass filter as applications of proposed programmable FGMOS resistor are also suggested. The power dissipation of reciprocal circuit and low-pass filter are 14.7 and 131 µW, respectively. To demonstrate the efficacy of the circuits, simulations are carried out using SPICE on 0.13 µm CMOS technology.
Titel: |
Low-power analogue computational blocks based on high-performance floating-gate MOSFET resistor
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Autor/in / Beteiligte Person: | Rana, Charu ; Afzal, Neelofar ; Prasad, Dinesh |
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Zeitschrift: | International Journal of Electronics, Jg. 106 (2019-01-11), S. 663-678 |
Veröffentlichung: | Informa UK Limited, 2019 |
Medientyp: | unknown |
ISSN: | 1362-3060 (print) ; 0020-7217 (print) |
DOI: | 10.1080/00207217.2018.1519858 |
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