Interconnect Capacitance Characterization Using Charge-Injection-Induced Error-Free (CIEF) Charge-Based Capacitance Measurement (CBCM)
In: IEEE Transactions on Semiconductor Manufacturing, Jg. 19 (2006-02-01), S. 50-56
Online
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Zugriff:
In this work, we describe a novel operation of charge-injection-induced error-free charge-based capacitance measurement (CIEF CBCM) method. This method has the simplest test structure among various CBCM methods by using only one N/PMOS pair. CIEF CBCM has the advantage of being free from charge-injection-induced errors and of efficient layout area usage. It is very suitable for industrial applications for large amounts of accurate capacitance characterizations with a limited layout area. Besides, CIEF CBCM is also implemented for investigating the impact of floating dummy metal fills on interconnect capacitance directly from silicon data.
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Interconnect Capacitance Characterization Using Charge-Injection-Induced Error-Free (CIEF) Charge-Based Capacitance Measurement (CBCM)
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Autor/in / Beteiligte Person: | Chang, Hsin-Wen ; Lu, Chih-Yuan ; Ting, Wenchi ; Chang, Yao-Wen ; Ku, J. ; King, Ya-Chin ; Lu, Tao-Cheng |
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Zeitschrift: | IEEE Transactions on Semiconductor Manufacturing, Jg. 19 (2006-02-01), S. 50-56 |
Veröffentlichung: | Institute of Electrical and Electronics Engineers (IEEE), 2006 |
Medientyp: | unknown |
ISSN: | 0894-6507 (print) |
DOI: | 10.1109/tsm.2005.863228 |
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