Low Noise Amplifier with Improved Gain and Reduced Noise-Figure in 90nm CMOS Technology
In: International Journal of Advanced Research in Science, Communication and Technology, 2021-08-05, S. 85-94
Online
unknown
Zugriff:
A CMOS low noise amplifier (LNA) for ultra-wideband (UWB) wireless applications is presented in this paper. The proposed CMOS low noise amplifier (LNA) is designed using common-gate (CG) topology as the first stage to achieve ultra-wideband input matching. The common-gate (CG) is cascaded with common- source (CS) topology with current-reused configuration to enhance the gain and noise figure (NF) performance of the LNA with low power. The Buffer stage is used as output matching network to improve the reflection coefficient. The proposed low noise amplifier (LNA) is implemented using CADENCE Virtuoso Analog and Digital Design Environment tool in 90nm CMOS technology. The LNA provides a forward voltage gain or power gain (S21) of 32.34dB , a minimum noise figure of 2dB, a reverse-isolation (S12) of less than - 38.74dB and an output reflection coefficient (S22) of less than -7.4dB for the entire ultra-wideband frequency range. The proposed LNA has an input reflection coefficient (S11) of less than -10dB for the ultra-wideband frequency range. It achieves input referred 1-dB compression point of 78.53dBm and input referred 3-dB compression point of 13dBm. It consumes only 24.226mW of power from a Vdd supply of 0.7V.
Titel: |
Low Noise Amplifier with Improved Gain and Reduced Noise-Figure in 90nm CMOS Technology
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Autor/in / Beteiligte Person: | Raghavendra, B ; Sanketh ; Rashmi, S B |
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Zeitschrift: | International Journal of Advanced Research in Science, Communication and Technology, 2021-08-05, S. 85-94 |
Veröffentlichung: | Naksh Solutions, 2021 |
Medientyp: | unknown |
ISSN: | 2581-9429 (print) |
DOI: | 10.48175/ijarsct-1815 |
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