Faster Arithmetic and Logical Unit CMOS Design with Reduced Number of Transistors
In: Computer Networks and Information Technologies ISBN: 9783642195419; (2011)
Online
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Zugriff:
The Arithmetic and Logic Unit (ALU) is a combination circuit that performs a number of arithmetic and logical operations. Over the past two decades, Complementary Metal Oxide Semiconductor (CMOS) technology has played important role in designing high performance systems because of the advantages that CMOS provides: an exceptionally low power-delay product, the ability to accommodate millions of devices on a single chip. To take the benefits of CMOS technology a novel ALU Circuit is proposed in this paper. An improved and efficient adder circuit called mirror adder [3] is used which helps in decreasing the RC delay. Also a programmable logic circuit is included to configure mirror adder circuit to subtractor circuit depending upon programmable input; this implementation helps in reducing the transistor count and power dissipation, decreasing parasitic capacitance hence increasing speed.
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Faster Arithmetic and Logical Unit CMOS Design with Reduced Number of Transistors
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Autor/in / Beteiligte Person: | Wajid, Mohd ; Patel, Rachit ; Parashar, Harpreet |
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Quelle: | Computer Networks and Information Technologies ISBN: 9783642195419; (2011) |
Veröffentlichung: | Springer Berlin Heidelberg, 2011 |
Medientyp: | unknown |
ISBN: | 978-3-642-19541-9 (print) |
DOI: | 10.1007/978-3-642-19542-6_100 |
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