High resolution delta-sigma analog-to-digital converters implemented in III/V HBT technology

AM - This puper describes the development of andog-todigital converters (ADCs) providing high dynamk range. The ADCs are high order low-pass and band-pass delta-sigma modulators with continuous-lime low-pass and band-pass loop filters and are fubricated in an indium phosphide (InP) heterbjunciion bipolur (HBlJ technology. Loop sampling frequencies range from I CHz to 2.5 CHz, wiih center frequencies ranging from DC 10 100 MHL Between 12 and 13.7 bits of resolution has been achievedfor bandwidths of 25 MHz and 12.5 MHz, respectively. I. INTRODUCTION Currently, receivers for high performance communications, test and measurement utilize complex, bulky, and expensive RF electronics. In communications, multiple receivers are needed to receive more than one carrier and to handle the multiplicity of communication formats now in use. Receivers must be added or replaced as new formats are fielded. Test equipment requires multiple frequency conversion and filtering stages, and can achieve high dynamic range only for narrow instantaneous bandwidth. An ultra high dynamic range, wideband, IF sampling ADC will enable the reception and measurement of multiple carriers and multiple communication formats within a single, software programmable receiver [1,2]. Resolution of 14 to 16 bits over 'bandwidths of up to 100 MHz is needed. Conventional ADC architectures, such as subranging, have generally been unable to achieve more than 12 effective bits of resolution at these bandwidths [3] due to device matching and thermal noise limitations. The delta-sigma architecture has the potential to achieve the desired resolution. However, reported performance bas fallen short of this potential [4]. This paper describes continuous-time delta-sigma band-pass modulators implemented in indium phosphide (InP) heterojunction bipolar transistor (HBT) integrated circuit technology and demonstrating high dynamic range. 11:. ARCHITECTURE