Design of double edge-triggered flip-flop for low-power educational environment
In: The International Journal of Electrical Engineering & Education, 2019-08-03, S. 002072091986583
Online
unknown
Zugriff:
Power consumption plays a significant role in any integrated circuit. In this study, an explicit type pulse trigger flip-flop is implemented using the CMOS 90 nm technology. For low-power dissipati...
Titel: |
Design of double edge-triggered flip-flop for low-power educational environment
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Autor/in / Beteiligte Person: | Punitha, L ; Sundararajan, J ; Jose, Deepa ; Krishnasamy Nirmala Devi |
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Zeitschrift: | The International Journal of Electrical Engineering & Education, 2019-08-03, S. 002072091986583 |
Veröffentlichung: | SAGE Publications, 2019 |
Medientyp: | unknown |
ISSN: | 2050-4578 (print) ; 0020-7209 (print) |
DOI: | 10.1177/0020720919865836 |
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