High-Speed Active Quench and Reset Circuit for SPAD in a Standard 65 nm CMOS Technology
In: IEEE Photonics Technology Letters, Jg. 33 (2021-12-15), S. 1431-1434
Online
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Zugriff:
A compact high-speed active quench and reset (AQR) circuit integrated with a p+/n-well single-photon avalanche diode (SPAD) is designed and fabricated in a standard 65 nm CMOS technology. The post-layout simulations showed that the quenching time for this AQR circuit is only 0.1 ns, and the smallest dead time is 3.35 ns which corresponds a maximum count rate of ~300 Mcps. The measurements showed that the SPAD pixel achieved a dark count rate of 21 kHz, a peak photon detection probability of 23.8% at a 420 nm wavelength and a timing jitter of 139 ps (using a 405 nm pulsed laser) when the excess voltage was 0.5 V. Also, due to the short quenching time, negligible afterpulsing was observed during the measurements.
| Titel: |
High-Speed Active Quench and Reset Circuit for SPAD in a Standard 65 nm CMOS Technology
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| Autor/in / Beteiligte Person: | Jiang, Wei ; Scott, Ryan P. ; M. Jamal Deen |
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| Zeitschrift: | IEEE Photonics Technology Letters, Jg. 33 (2021-12-15), S. 1431-1434 |
| Veröffentlichung: | Institute of Electrical and Electronics Engineers (IEEE), 2021 |
| Medientyp: | unknown |
| ISSN: | 1941-0174 (print) ; 1041-1135 (print) |
| DOI: | 10.1109/lpt.2021.3124989 |
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