A 50 Gb/s PAM-4 VCSEL Transmitter With 2.5-Tap Nonlinear Equalization in 65-nm CMOS
In: IEEE Photonics Technology Letters, Jg. 30 (2018-07-01), S. 1246-1249
Online
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Zugriff:
Utilizing four-level pulse-amplitude modulation (PAM-4) with vertical-cavity surface emitting lasers (VCSELs) is challenging due to device nonlinearity and bandwidth limitations. This letter presents a VCSEL-based PAM-4 transmitter that employs a 2.5-tap nonlinear equalizer to compensate for these issues. The transmitter utilizes lookup-table control of a current-mode digital-to-analog converter (DAC) output stage to enable independent equalization coefficients for different PAM-4 symbol transitions. Utilizing half pre-cursor (MSB only), one main, and one post-cursor taps provides a good balance between circuit complexity and performance. Equalization resolution is increased by segmenting the output stage into a 2-bit symbol DAC and a fine 3-bit equalization DAC. Fabricated in GP 65-nm CMOS, the serializing transmitter operates at 50 Gb/s with 3-dBm optical modulation amplitude (OMA) when driving an 11-GHz VCSEL and achieves 5.12 pJ/bit power efficiency.
| Titel: |
A 50 Gb/s PAM-4 VCSEL Transmitter With 2.5-Tap Nonlinear Equalization in 65-nm CMOS
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| Autor/in / Beteiligte Person: | Sorin, Wayne V. ; Wang, Binhao ; Tan, Michael ; Palermo, Samuel ; Tyagi, Abhinav ; Mathai, Sagi ; Yu, Kunzhi ; Iwai, Takayuki |
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| Zeitschrift: | IEEE Photonics Technology Letters, Jg. 30 (2018-07-01), S. 1246-1249 |
| Veröffentlichung: | Institute of Electrical and Electronics Engineers (IEEE), 2018 |
| Medientyp: | unknown |
| ISSN: | 1941-0174 (print) ; 1041-1135 (print) |
| DOI: | 10.1109/lpt.2018.2841841 |
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