Analog circuit design is comparatively more complex than its digital counterpart due to its nonlinearity and low level of abstraction. This study proposes a novel low‐level hybrid of the sine‐cosine algorithm (SCA) and modified grey‐wolf optimization (mGWO) algorithm for machine learning‐based design automation of CMOS analog circuits using an all‐CMOS voltage reference circuit in 40‐nm standard process. The optimization algorithm's efficiency is further tested using classical functions, showing that it outperforms other competing algorithms. The objective of the optimization is to minimize the variation and power usage, while satisfying all the design limitations. Through the interchange of scripts for information exchange between two environments, the SCA‐mGWO algorithm is implemented and simultaneously simulated. The results show the robustness of analog circuit design generated using the SCA‐mGWO algorithm, over various corners, resulting in a percentage variation of 0.85%. Monte Carlo analysis is also performed on the presented analog circuit for output voltage and percentage variation resulting in significantly low mean and standard deviation.
Keywords: algorithm; analog circuits; design automation; machine learning; optimization
There is a significant increase in complexity while reducing the overall time‐to‐market of an integrated circuit due to the technology scaling and increased demand for electronics. Furthermore, increased nonlinearity makes achieving the global optimum solution at advanced technology nodes more difficult. Complex circuits at lower technology nodes increase the search space, necessitating the use of automated analog circuits design approaches.
Equation‐based and simulation‐based approaches are two of the most commonly used ways for design automation of complementary metal‐oxide‐semiconductors (CMOS) analog circuits, where the design equations and simulator are employed in the synthesis stage of circuit design, respectively. The state‐of‐the‐art literature shows that metaheuristic algorithms such as particle swarm optimization (PSO) [1–6], grey‐wolf optimization (GWO) [
This study proposes a novel hybrid algorithm using low‐level teamwork hybridization of the sine‐cosine algorithm (SCA) [
The rest of the paper is organized as follows: Section 2 describes the hybridization of the SCA‐mGWO algorithm. The validation and comparison of the proposed algorithm with other competing algorithms is presented in Section 3. The circuit description and formulation of the cost function are explained in Section 4. Section 5 discusses the simulation results and comparison. Finally, the paper is concluded in Section 6.
The SCA and mGWO algorithms are swarm intelligence‐based algorithms inspired by mathematical models of sine‐cosine functions and grey‐wolf hunting behavior [
This section explains the detailed optimization flow of the proposed hybrid SCA‐mGWO algorithm (Figure 1).
Step 1: The random vector is initialized as the beginning point of the optimization process with population size, N, and dimension, D.
1
where X
Step 2: The fitness of the objective function is evaluated for each search agent, X
Step 3: The algorithm parameters, such as r
2
where r
Step 4: When A < 1, the position of the search agent is updated using the equations shown below.
- 3
- 4
- 5
where
Step 5: When A > 1 and r
6
Step 6: When A > 1 and r
7
where
Step 7: Any violation in the control variable results in setting the value to lower or upper limit.
Step 8: If the termination criteria are not satisfied, continue from Step 3. Else, output the optimum solution.
1 TABLEResults of 23 benchmark functions for F 1 – F 4 , F 7 – F 11 , and F 14
Function SCA‐mGWO SCA WOA GWO PSO DE GSAPSO F1 Best 2.07E−201 5.18E−40 8.60E−192 1.56E−149 5.71E−55 1.38E−43 5.91E−21 Mean 3.66E−193 2.14E−30 4.56E−179 1.07E−142 1.45E−49 6.60E−42 1.25E−20 SD 0.00E+00 5.23E−30 0 3.90E−142 5.90E−49 1.35E−41 4.14E−21 Median 4.35E−198 6.47E−33 2.00E−187 1.72E−144 3.79E−51 1.92E−42 1.23E−20 Worst 6.18E−192 2.09E−29 9.11E−178 1.75E−141 2.65E−48 6.17E−41 2.28E−20 F2 Best 1.54E−123 1.64E−25 4.40E−118 4.07E−84 4.10E−29 5.79E−25 1.37E−10 Mean 5.66E−111 1.18E−19 5.54E−108 9.29E−81 1.16E−26 1.30E−24 2.33E−10 SD 2.49E−110 5.23E−19 1.19E−107 2.83E−80 3.52E−26 6.84E−25 4.62E−11 Median 8.64E−116 1.24E−22 6.60E−109 9.38E−82 1.03E−27 1.10E−24 2.40E−10 Worst 1.12E−109 2.34E−18 4.47E−107 1.27E−79 1.56E−25 2.98E−24 3.17E−10 F3 Best 1.54E−71 8.40E−20 3.59E−07 9.12E−76 3.53E−18 0.053351 4.64E−21 Mean 1.03E−50 7.01E−13 1.2299 7.10E−68 4.12E−15 0.233905 2.53E−20 SD 4.52E−50 1.69E−12 2.5161 1.40E−67 7.90E−15 0.149742 1.13E−20 Median 2.09E−58 9.48E−16 0.3054 3.78E−71 1.83E−16 0.170758 2.53E−20 Worst 2.02E−49 6.32E−12 8.9353 5.51E−67 2.96E−14 0.580544 5.10E−20 F4 Best 5.52E−88 4.69E−13 1.79E−08 5.40E−58 1.06E−14 7.88E−08 4.14E−11 Mean 8.96E−77 3.30E−10 0.0914 1.38E−45 4.91E−13 1.69E−07 6.26E−11 SD 3.63E−76 4.50E−10 0.2939 4.78E−45 8.12E−13 4.76E−08 9.31E−12 Median 1.19E−79 7.19E−11 0.0002 7.47E−47 9.48E−14 1.70E−07 6.21E−11 Worst 1.63E−65 1.61E−09 1.2634 2.16E−44 3.35E−12 2.64E−07 7.87E−11 F7 Best 9.17E−07 4.23E−05 1.01E−05 6.46E−05 0.0006 0.0008 0.0009 Mean 1.3E−04 7.1E−04 9.0E−04 2.4E−04 2.1E−03 2.3E−03 4.5E−03 SD 9.60E−05 6.4E−04 1.1E−03 1.7E−03 1.3E−03 1.1E−03 2.7E−03 Median 1.00E−04 5.00E−04 3.00E−04 1.00E−04 2.00E−03 2.10E−03 4.10E−03 Worst 4.00E−04 2.60E−03 3.90E−03 6.00E−04 5.90E−03 4.60E−03 1.08E−02 F8 Best −4.19E+03 −2.43E+03 −4.19E+03 −3.42E+03 −3.54E+03 −4.19E+03 −3.68E+03 Mean −3.24E+03 −2.26E+03 −3.63E+03 −2.88E+03 −2.64E+03 −4.18E+03 −3.11E+03 SD 6.46E+02 1.12E+02 6.62E+02 3.36E+02 4.36E+02 2.65E+01 3.03E+02 Median −3.01E+03 −2.29E+03 −4.01E+03 −2.90E+03 −2.64E+03 −4.19E+03 −3.11E+03 Worst −2.35E+03 −2.06E+03 −2.45E+03 −2.31E+03 −1.91E+03 −4.07E+03 −2.57E+03 F9 Best 0.00E+00 0.00E+00 0.00E+00 0.00E+00 9.95E−01 0.00E+00 4.97E+00 Mean 0.00E+00 9.67E−01 0.00E+00 1.57E−01 3.03E+00 0.00E+00 2.93E+01 SD 0.00E+00 4.33E+00 0.00E+00 7.02E−01 1.60E+00 0.00E+00 1.50E+01 Median 0.00E+00 0.00E+00 0.00E+00 0.00E+00 2.98E+00 0.00E+00 2.89E+01 Worst 0.00E+00 1.93E+01 0.00E+00 3.14E+00 5.97E+00 0.00E+00 5.47E+01 F10 Best 8.88E−16 8.88E−16 8.88E−16 4.44E−15 4.44E−15 4.44E−15 9.30E−11 Mean 3.16E−15 4.44E−15 3.20E−15 4.97E−15 4.80E−15 4.44E−15 1.26E−10 SD 7.94E−16 1.15E−15 2.38E−15 1.30E−15 1.09E−15 0 1.68E−11 Median 4.44E−15 4.44E−15 4.44E−15 4.44E−15 4.44E−15 4.44E−15 1.27E−10 Worst 4.44E−15 7.99E−15 7.99E−15 7.99E−15 7.99E−15 4.44E−15 1.52E−10 F11 Best 0.00E+00 0.00E+00 0.00E+00 0.00E+00 4.43E−02 0.00E+00 6.88E−02 Mean 0.00E+00 3.77E−02 3.95E−02 1.31E−02 1.50E−01 0.00E+00 1.55E−01 SD 0.00E+00 1.38E−01 9.57E−02 2.20E−02 9.91E−02 0.00E+00 9.29E−02 Median 0.00E+00 0.00E+00 0.00E+00 0.00E+00 1.44E−01 0.00E+00 1.21E−01 Worst 0.00E+00 6.07E−01 3.77E−01 7.15E−02 4.55E−01 0.00E+00 3.94E−01 F14 Best 9.98E−01 9.98E−01 9.98E−01 9.98E−01 9.98E−01 9.98E−01 9.98E−01 Mean 9.98E−01 1.30E+00 1.30E+00 2.67E+00 2.18E+00 9.98E−01 2.56E+00 SD 0.00E+00 7.27E−01 7.27E−01 2.92E+00 1.71E+00 0.00E+00 3.38E+00 Median 9.98E−01 9.98E−01 9.98E−01 9.98E−01 1.99E+00 9.98E−01 9.98E−01 Worst 9.98E−01 2.98E+00 2.98E+00 1.08E+01 5.93E+00 9.98E−01 1.55E+01
2 TABLEResults of 23 benchmark functions for F 15 – F 21
Function SCA‐mGWO SCA WOA GWO PSO DE GSAPSO F15 Best 3.00E−04 3.00E−04 3.00E−04 3.00E−04 3.00E−04 4.00E−04 3.00E−04 Mean 4.00E−04 8.00E−04 5.00E−04 1.40E−03 7.00E−04 6.00E−04 5.40E−03 SD 5.53E−05 4.00E−04 3.00E−04 4.40E−03 2.00E−04 8.57E−05 8.80E−03 Median 3.00E−04 7.00E−04 3.00E−04 3.00E−04 8.00E−04 6.00E−04 3.00E−04 Worst 6.00E−04 1.40E−03 1.40E−03 2.03E−02 1.00E−03 7.00E−04 2.03E−02 F16 Best −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 Mean −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 SD 1.36E−16 1.23E−05 3.25E−12 2.48E−09 2.28E−16 2.28E−16 2.10E−16 Median −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+0 Worst −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+00 −1.03E+0 F17 Best 3.98E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 Mean 3.98E−01 3.99E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 SD 0.00E+00 7.00E−04 1.77E−07 9.97E−07 0.00E+00 0.00E+00 3.15E−06 Median 3.98E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 Worst 3.98E−01 4.02E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 3.98E−01 F18 Best 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 Mean 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 SD 3.47E−16 7.03E−06 3.15E−06 8.04E−06 3.95E−16 5.49E−16 1.34E−15 Median 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 Worst 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 3.00E+00 F19 Best −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 Mean −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 SD 2.00E−04 3.40E−03 1.40E−03 3.20E−03 2.28E−15 2.28E−15 2.22E−15 Median −3.86E+00 −3.85E+00 −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 −3.86E+00 Worst −3.86E+00 −3.85E+00 −3.86E+00 −3.85E+00 −3.86E+00 −3.86E+00 −3.86E+00 F20 Best −3.32E+00 −3.12E+00 −3.32E+00 −3.32E+00 −3.32E+00 −3.32E+00 −3.32E+00 Mean −3.32E+00 −3.05E+00 −3.27E+00 −3.26E+00 −3.26E+00 −3.32E+00 −3.28E+00 SD 2.07E−06 5.04E−02 7.17E−02 7.67E−02 6.09E−02 5.06E−06 5.81E−02 Median −3.32E+00 −3.01E+00 −3.32E+00 −3.32E+00 −3.26E+00 −3.32E+00 −3.32E+00 Worst −3.32E+00 −3.01E+00 −3.12E+00 −3.13E+00 −3.20E+00 −3.32E+00 −3.20E+00 F21 Best −1.02E+01 −6.72E+00 −1.02E+01 −1.02E+01 −1.02E+01 −1.02E+01 −1.02E+01 Mean −9.39E+00 −3.60E+00 −8.88E+00 −9.39E+00 −8.14E+00 −1.02E+01 −5.13E+00 SD 1.87E+00 2.30E+00 2.26E+00 1.86E+00 2.89E+00 3.18E−15 2.81E+00 Median −1.02E+01 −4.69E+00 −1.02E+01 −1.02E+01 −1.02E+01 −1.02E+01 −5.06E+00 Worst −5.06E+00 −4.97E−01 −5.05E+00 −5.06E+00 −2.63E+00 −1.02E+01 −2.63E+00
The hybrid SCA‐mGWO algorithm's efficiency is assessed by running several tests and comparing the results to those of other competing algorithms using a collection of 23 classical and popular functions as a benchmark [
The comparison of the convergence rates for functions F1–F23 using SCA‐mGWO and other competing algorithms have been investigated and the same for a few functions, that is, F
The algorithms cannot be compared for each individual run based solely on statistical values from 20 different runs. Hence, there is always a possibility that the predominance may have occurred by chance. The Wilcoxon statistical test is performed at 5% significance level, and the p values are compared for each run, and the significance of the results is decided, as shown in Table 3. For the statistical test, the best algorithm in each test function is compared with other algorithms independently. For example, if the best algorithm is SCA‐mGWO, pairwise comparison is made between SCA‐mGWO/SCA, SCA‐mGWO/GWO, SCA‐mGWO/PSO, and so forth. As shown in Table 3, p values for most of the functions are much less than 5% for the SCA‐mGWO, demonstrating its statistical significance. The SCA‐mGWO algorithm does not yield a p value greater than 0.05 for any of the functions, indicating that the SCA‐mGWO algorithm is not similar to base algorithms or any other competing algorithm.
3 TABLE p values calculated for the Wilcoxon rank‐sum test
SCA‐mGWO SCA WOA GWO PSO DE GSAPSO F1 0.00E+00 6.80E−08 6.80E−08 6.80E−08 6.80E−08 6.80E−08 3.65E−05 F2 0.00E+00 6.80E−08 6.80E−08 6.80E−08 6.80E−08 6.80E−08 3.63E−05 F3 0.00E+00 7.61E−01 3.66E−05 0.00E+00 3.66E−05 3.66E−05 3.66E−05 F4 0.00E+00 6.80E−08 6.80E−08 6.80E−08 6.80E−08 6.80E−08 3.66E−05 F5 2.72E−04 1.52E−04 2.47E−04 2.25E−04 4.87E−01 0.00E+00 5.20E−04 F6 0.00E+00 1.31E−07 1.31E−07 1.31E−07 0.00E+00 0.00E+00 1.31E−07 F7 0.00E+00 1.41E−05 2.36E−06 1.50E−03 6.80E−08 6.80E−08 3.66E−05 F8 3.80E−09 3.80E−09 3.80E−09 3.80E−09 3.80E−09 0.00E+00 3.80E−09 F9 0.00E+00 0.00E+00 0.00E+00 0.00E+00 5.76E−09 0.00E+00 1.31E−07 F10 0.00E+00 1.63E−01 9.57E−01 3.93E−02 3.98E−02 3.90E−02 2.23E−05 F11 0.00E+00 1.69E−01 1.16E−01 2.40E−02 3.53E−07 1.62E−01 4.11E−07 F12 1.35E−05 1.35E−05 1.35E−05 1.35E−05 1.03E−01 0.00E+00 1.35E−05 F13 1.35E−05 1.35E−05 1.35E−05 1.35E−05 1.04E−01 0.00E+00 1.35E−05 F14 0.00E+00 1.60E−02 5.17E−06 6.38E−02 6.02E−05 8.01E−09 4.90E−03 F15 0.00E+00 6.80E−08 6.80E−08 2.00E−04 6.80E−08 6.80E−08 3.61E−05 F16 0.00E+00 6.80E−08 6.80E−08 4.41E−01 8.01E−09 8.01E−09 1.99E−02 F17 0.00E+00 6.80E−08 1.05E−06 8.18E−01 8.01E−09 8.01E−09 3.79E−09 F18 0.00E+00 1.20E−03 1.20E−06 1.00E−03 1.13E−08 3.93E−08 3.80E−09 F19 0.00E+00 8.45E−02 2.28E−08 1.16E−01 5.20E−04 1.35E−05 0.00E+00 F20 0.00E+00 6.80E−08 6.38E−02 1.05E−02 2.89E−02 1.13E−08 1.26E−05 F21 3.80E−09 3.80E−09 3.80E−09 3.80E−09 4.30E−03 0.00E+00 1.04E−01 F22 0.00E+00 1.00E−04 1.00E−04 5.00E−04 1.60E−03 4.21E−08 2.75E−05 F23 3.80E−09 3.80E−09 3.80E−09 3.80E−09 5.61E−02 0.00E+00 1.04E−01
An IC sizing tool for the automated design of analog circuits is presented in this section. The proposed tool, Figure 3, uses the simulation‐based methodology and the proposed SCA‐mGWO algorithm in the synthesis and optimization sections, respectively. Note that the SPECTRE simulator simulates analog circuits, and a hybrid SCA‐mGWO algorithm is implemented in MATLAB. The synthesis and optimization sections of this tool are connected through the interface between CADENCE and MATLAB. The process starts by determining the design parameters and constraints while reasonably selecting the predefined range for each design parameter. The initial population of the circuit parameters (N masses) is randomly generated, and the same is given to the synthesis section as a starting point of the design process. The initial design parameters are sent to the input file in the synthesis section. Then, the circuit is simulated using a specter considering the received inputs and saves the performance metrics to the output file. While evaluating the fitness, the proposed tool reads the output file and calculates the violation of each constraint. This utility then runs the SCA‐mGWO optimization process to generate new design parameters for the following iteration. This process is continued until the termination criterion is satisfied. Finally, the optimal circuit sizing is found and reported for the analog circuit.
The schematic of a CMOS voltage reference circuit with a current source and bias voltage subcircuits is shown in Figure 4. In the current source subcircuit with modified β multiplier self‐biasing, a MOS resistor (MR
The operation of the circuit is described in this section. All the transistors are operated in the subthreshold region except for MR
8
where K is the aspect ratio of the transistor, μ is the carrier mobility, C
9
The gate‐to‐source voltage of M
10
The current in M
11
where V
The cost function is calculated by considering both the constraints and the target that must be met when optimizing the circuit. The limitations are as follows:
- Maintain the widths and lengths of current mirror transistors MC
1 , MC2 and M1 , M2 . 12 - For proper matching, maintain the lengths and widths of transistors MC
1 , MC2 , MC3 , MC4 , and MC5 while changing the multipliers. 133 , mc4 , and mc5 are the multipliers of the transistors MC3 , MC4 , and MC5 , respectively. - Avoid the currents less than the leakage currents, that is, 1 nA. 14
- For proper matching, maintain the widths and lengths of transistors M
3 , M4 , M5 , M6 , and M7 while modifying the multipliers. 153 , m4 , m5 , m6 , and m7 are the multipliers of the transistors M3 , M4 , M5 , M6 , and M7 , respectively.
The major aim of the optimization is to reduce the overall variation of the output voltage across the range of temperature, that is, −40°C to 100°C, while satisfying all the constraints. The variation of the output reference voltage, VREF, across temperature is given by
16
where V
The overall cost function is given by
17
where P
To validate the proposed SCA‐mGWO algorithm, MATLAB (R2017a) on Intel core i3‐4010U CPU @ 1.70 GHz processor with 12 GB RAM was used. Besides, the algorithm's automation methodology is tested using CADENCE (IC6.1.8) in a 40‐nm standard process with all‐CMOS voltage regulators as a benchmark. The targeted reference voltage is 550 mV with constraints on the currents in each mirror to be greater than 1 nA for avoiding the effect of leakage currents, avoiding minimum dimensions to reduce mismatch, and matching in the current mirrors. The range for the lengths and multipliers is from 1 μm to 20 μm and from 1 to 100, respectively. For proper matching, the widths of the transistors are maintained constant at 1 μm. The design parameters obtained using the SCA‐mGWO algorithm are demonstrated in Table 4, which also shows that the maximum multiplier value obtained is 47 μm, making the maximum total width of the transistors to be 47 μm.
4 TABLEDesign parameters obtained using SCA‐mGWO algorithm
Par. Val. Par. Val. Par. Val. Par. Val. 4μ 4μ 1 47 4μ 4μ 1 21 4μ 4μ 1 40 8μ 4μ 2 10 4μ 4μ 4 21 8μ W 1μ 5 4μ 15
The convergence plot of the SCA‐mGWO algorithm for the variation of reference voltage in CMOS voltage regulator is illustrated in Figure 5 with the minimum variation of 0.85%. The convergence plot also shows that the proposed algorithm results in the optimum solution at 24th iteration proving its efficiency in solving analog circuit sizing problems.
Table 5 demonstrates the numerical results depicting the reference voltage (V
5 TABLEComparison of the performance of SCA‐mGWO and other competing algorithms
Parameter SCA mGWO PSO SCA WOA mGWO VREF (mV) 550.1 550.3 544.9 551.7 548.9 Vmax (mV) 5.678 5.520 19.180 16.420 4.957 Vmin (μV) 4.154 286.000 313.000 322.400 242.000 Delta (mV) 5.678 5.520 19.180 16.420 4.957 Variation 0.850% 0.950% 1.724% 1.179% 1.032% Power (nW) 15.66 26.55 38.32 22.21 30.28 TC (ppm/°C) 60.70 67.78 123.14 84.20 73.14
The divergence of V
The robustness of the design is also evaluated using by varying the V
Figure 12 shows the percentage variation of the output reference voltage with respect to V
Monte Carlo simulation was performed for reference voltage V
The simulation results and Monte Carlo analysis show the robustness of the circuit designed with the SCA‐mGWO algorithm, as well as the efficiency of the proposed automation methodology. The examination across the corners confirms the output voltage's consistency while proving the SCA‐mGWO algorithm's stability, which is possible when a significant balance between exploration and exploitation is maintained.
The automation of CMOS analog circuits has become important to cope with the increased pace of technology scaling and reduced time‐to‐market of the entire IC. In this paper, a novel SCA‐mGWO algorithm is applied in the optimization section of the automation process. The SCA‐mGWO algorithm is validated using benchmark functions, and the SCA‐mGWO algorithm outperforms competing algorithms for 14 functions. The SCA‐mGWO algorithm‐based optimization methodology is evaluated using a case study with a CMOS voltage reference circuit. The optimum design parameters obtained using the optimization algorithm are implemented in CADENCE. The simulation results demonstrate that the design can obtain the variation of 0.85% over the temperature range of −40°C through 100°C. The circuit is also tested for its efficiency over different corners, that is, TT, SS, SF, FF, and FS, and the overall variation across corners is obtained to be 4%. Also, the Monte Carlo analysis is performed to evaluate the design's robustness, obtained using the SCA‐mGWO algorithm, resulting in a standard deviation of variation of 70.78 m%. To further sophisticate the process, a multiobjective optimization algorithm with advanced constraint handling techniques can be used in the presented approach.
The authors declare that there are no conflicts of interest.
By Vijaya Babu E and Syamala Y
Reported by Author; Author
Vijaya Babu E is pursuing PhD from JNTUk, Kakinada, Andhra Pradesh, India. He has been working as an Assistant Professor at Vardhaman College of Engineering, Telangana, India. He is a member of IE. His research interests include low‐power VLSI, digital design, and testing.
Syamala Y received her BE and ME from Bharathiyar University and Anna University in 2001 and 2005, respectively. She obtained PhD from JNTU, Hyderabad, in 2014. She has been working as an Associate Professor at Gudlavalleru Engineering College, Andhra Pradesh, India. She is a member of IEEE, FIETE, and MISTE. Her research interest includes low‐power VLSI, digital design, and testing.