A 650 kV/μs Common-Mode Resilient CMOS Galvanically Isolated Communication System
In: IEEE Transactions on Circuits and Systems I: Regular Papers, Jg. 69 (2022-02-01), S. 587-598
Online
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Zugriff:
This work presents a galvanically isolated chip-to-chip communication system that utilizes laterally coupled resonators in combination with a new differential full-wave receiver architecture. Lateral resonant coupling increases the isolation capability and significantly minimizes the intra-chip coupling capacitance of galvanic isolators beyond the limits of vertical coupling in standard CMOS. The presented system marries the merits of a laterally resonant coupled channel with a source-gate coupled low-power, low-latency RF detector architecture that enables high common-mode and differential noise immunity. A center-tapped transformer is used as the interface between the proposed fully differential receiver and the communication channel to further enhance the common-mode transient immunity (CMTI). The proposed system is integrated in a 0.25 μm CMOS process with four metal layers and does not alter the native process or necessitate additional fabrication steps. The design does not require exotic packaging and achieves state-of-art CMTI of 650 kV/μs at 5 kVpk isolation, sub-20ns propagation delay, and maintains a small form-factor of 0.95 mm². The GI system exhibits robust performance to fabrication variations, with less than ±0.3% and ±8% sensitivity to process variation and post-assembly chip distance offset, respectively.
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A 650 kV/μs Common-Mode Resilient CMOS Galvanically Isolated Communication System
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Autor/in / Beteiligte Person: | Kitchen, Jennifer ; Javid, Mahdi ; Ptacek, Karel ; Burton, Richard |
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Zeitschrift: | IEEE Transactions on Circuits and Systems I: Regular Papers, Jg. 69 (2022-02-01), S. 587-598 |
Veröffentlichung: | Institute of Electrical and Electronics Engineers (IEEE), 2022 |
Medientyp: | unknown |
ISSN: | 1558-0806 (print) ; 1549-8328 (print) |
DOI: | 10.1109/tcsi.2021.3124554 |
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