A dual-mode successive approximation register analog to digital converter to detect malicious off-chip power noise measurement attacks
In: Japanese Journal of Applied Physics, Jg. 60 (2021-02-10), S. SBBL03
Online
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Zugriff:
An on-chip noise monitor using a dual-mode analog to digital converter (ADC) is developed to detect the insertion of off-chip components as malicious attempts of power noise measurement attacks. A two-step sampling scheme selecting either synchronous or asynchronous clocking enables both real-time monitoring and high-resolution diagnosis of power supply noise, respectively. The monitor detects the change in power-line impedance and assumes the happening of physical contacts by an attacker’s device. A wide-band ADC with the bandwidth of 1 GHz facilitates the analysis of on-chip captured waveforms and the recognition of potentially inserted devices. Fabricated in 65 nm CMOS, the on-chip noise monitor is examined for the detectability of series resistors as well as parallel capacitors that are intentionally inserted on power lines. The experiments demonstrated the detection of a power current sensor in series to power lines, and also the attachment of an oscilloscope probe, through the analysis of on-chip captured power noise waveforms.
Titel: |
A dual-mode successive approximation register analog to digital converter to detect malicious off-chip power noise measurement attacks
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Autor/in / Beteiligte Person: | Nagata, Makoto ; Wadatsumi, Takuya ; Miki, Takuji |
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Zeitschrift: | Japanese Journal of Applied Physics, Jg. 60 (2021-02-10), S. SBBL03 |
Veröffentlichung: | IOP Publishing, 2021 |
Medientyp: | unknown |
ISSN: | 1347-4065 (print) ; 0021-4922 (print) |
DOI: | 10.35848/1347-4065/abde26 |
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