Circuit Under on-chip-inductor structure (CUL) for the areal size reduction of Si-based RF circuit
In: 2019 Electron Devices Technology and Manufacturing Conference (EDTM), 2019-03-01
Online
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Zugriff:
A novel Circuit Under on-chip-inductor structure (CUL) including high-Q inductor (Q peak > 19) formed in the redistribution layer (RDL) is proposed to reduce the chip-size of RF embedded MCUs/SoCs. A design methodology for the CUL implementation without degrading RF performance is also discussed. Measured phase noise of LC-VCO with proposed CUL structure suggests that a footprint can be effectively reduced without compromising performances. We estimate that PLL size can be reduced by 30% with the proposed technology.
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Circuit Under on-chip-inductor structure (CUL) for the areal size reduction of Si-based RF circuit
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| Autor/in / Beteiligte Person: | Uchida, Shinichi ; Ono, Akio ; Iida, Tetsuya ; Nakashiba, Yasutaka ; Kuwajima, Teruhiro ; Takafumi, Kuramoto ; Kamada, Takuho ; Koh, Risho ; Matsumoto, Akira |
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| Zeitschrift: | 2019 Electron Devices Technology and Manufacturing Conference (EDTM), 2019-03-01 |
| Veröffentlichung: | IEEE, 2019 |
| Medientyp: | unknown |
| DOI: | 10.1109/edtm.2019.8731084 |
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