Low-power CMOS LNA based on dual resistive-feedback structure with peaking inductor for wideband application

This paper presents a low-power and low-noise amplifier (LNA) with resistive-feedback configuration. The design consists of two resistive-feedback amplifiers. In order to reduce the chip area, a resistive-feedback inverter is adopted for input matching. The output stage adopts basic topology of an RC feedback for output matching, and adds two inductors for inductive peaking at the high band. The implemented LNA has a peak gain of 10.5 dB, the input reflection coefficient S11is lower than −8 dB and the output reflection S22is lower than −10.8 dB, and noise figure of 4.2–5.2 dB is between 1 and 10 GHz while consuming 12.65 mW from a 1.5 V supply. The chip area is only 0.69 mm2and the figure of merit is 6.64 including the area estimation. The circuit was fabricated in a TSMC 0.18 um CMOS process.