Fabrication of 0.5 μm n- and p-type metal–oxide semiconductor test devices using x-ray lithography
In: Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, Jg. 7 (1989-11-01), S. 1642-1642
Online
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Zugriff:
Partially scaled 0.5 μm NMOS and PMOS test devices have been fabricated using synchrotron radiation x‐ray lithography for all four levels. All exposures were done at the IMT lithography lab at the BESSY storage ring in Berlin, using the Suss MAX I x‐ray stepper. The four levels of each device have been processed with the new Hoechst RAY/PF x‐ray sensitive resist. A total overlay accuracy of 130 nm (1σ) in x and y direction for all aligned levels and an overall linewidth variation of 23 nm (1σ) across a 100 mm wafer have been achieved. Reproducible NMOS and PMOS processes have been carried out in the CMOS process line of the institute, using gateoxide thicknesses between 15 and 10 nm, appropriate channel implants, and a spacer technology. Electrical results of functional test transistors with effective gate lengths down to 0.25 μm will be presented.
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Fabrication of 0.5 μm n- and p-type metal–oxide semiconductor test devices using x-ray lithography
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Autor/in / Beteiligte Person: | Staudt-Fischbach, P. ; Pelka, M. ; Huber, H.-L. ; Lange, P. ; Friedrich, D. ; Krullmann, E. ; Zwicker, G. ; Windbracke, W. ; Hemicker, P. ; Bernt, H. |
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Zeitschrift: | Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, Jg. 7 (1989-11-01), S. 1642-1642 |
Veröffentlichung: | American Vacuum Society, 1989 |
Medientyp: | unknown |
ISSN: | 0734-211X (print) |
DOI: | 10.1116/1.584506 |
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