Design and testing of a self-powered 3D integrated SOI CMOS system
In: Microelectronic Engineering, Jg. 85 (2008-02-01), S. 388-394
Online
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Zugriff:
A self-powering 3D integrated circuit built using an SOI CMOS process is presented. The 3D integrated circuit has three tiers connected by vertical vias through the intertier oxides. The circuit elements are a photodiode array, a charge-integrating capacitor, and a local oscillator with an output buffer, each on a separate tier. The final system size is 250@mmx250@mmx696@mm. Our results demonstrate the circuit as a feasible proof-of-concept 3D ''system''. The photodiode array stores charge on the capacitor and powers the oscillator as designed.
Titel: |
Design and testing of a self-powered 3D integrated SOI CMOS system
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Autor/in / Beteiligte Person: | Akturk, Akin ; Goldsman, Neil ; Metze, G. ; Dilli, Z. ; Peckerar, M. |
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Zeitschrift: | Microelectronic Engineering, Jg. 85 (2008-02-01), S. 388-394 |
Veröffentlichung: | Elsevier BV, 2008 |
Medientyp: | unknown |
ISSN: | 0167-9317 (print) |
DOI: | 10.1016/j.mee.2007.07.013 |
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