Deep sub-micron chip development
In: Nuclear Instruments & Methods in Physics Research. Section A, Accelerators, Spectrometers, Detectors and Associated Equipment, Jg. 569 (2006-12-01), Heft 1, S. 98-101
Online
unknown
Zugriff:
The application of a deep sub-micron CMOS process is rapidly being proliferated under a multi-chip project service through the joint efforts of related universities and research organizations. In order to compensate for the shortage in designer resources, circuit libraries of sub-micron CMOS processes have been organized to be used by amateur designers. In practice, the libraries are employed in several projects, and, thus, the libraries themselves gradually become more sophisticated to the extent of even being utilized for very recent fabrication processes such as a deep sub-micron FD-SOI CMOS process. A test circuit for the SOI CMOS process is designed and submitted to examine its performance and usefulness in a front-end analog circuit of radiation detectors.
Titel: |
Deep sub-micron chip development
|
---|---|
Autor/in / Beteiligte Person: | Ikeda, Hirokazu |
Link: | |
Zeitschrift: | Nuclear Instruments & Methods in Physics Research. Section A, Accelerators, Spectrometers, Detectors and Associated Equipment, Jg. 569 (2006-12-01), Heft 1, S. 98-101 |
Veröffentlichung: | Elsevier, 2006 |
Medientyp: | unknown |
ISSN: | 0168-9002 (print) |
Schlagwort: |
|
Sonstiges: |
|