CMOS back-end-of-line compatible ferroelectric tunnel junction devices
In: Solid-State Electronics, Volume 186, 108054 (2021); (2021)
Online
report
Ferroelectric tunnel junction devices based on ferroelectric thin films of solid solutions of hafnium dioxide can enable CMOS integration of ultra-low power ferroelectric devices with potential for memory and emerging computing schemes such as in-memory computing and neuromorphic applications. In this work, we present ferroelectric tunnel junctions based on Hf$_{0.5}$Zr$_{0.5}$O$_{2}$ with materials and processes compatible with CMOS back-end-of-line integration. We show a device architecture based on W-Hf$_{0.5}$Zr$_{0.5}$O$_{2}$-Al$_{2}$O$_{3}$-TiN stacks featuring low temperature annealing at 400{\deg}C with performance comparable to those obtained with higher temperature annealing conditions.
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CMOS back-end-of-line compatible ferroelectric tunnel junction devices
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Autor/in / Beteiligte Person: | Deshpande, Veeresh ; Nair, Keerthana Shajil ; Holzer, Marco ; Banerjee, Sourish ; Dubourdieu, Catherine |
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Quelle: | Solid-State Electronics, Volume 186, 108054 (2021); (2021) |
Veröffentlichung: | 2021 |
Medientyp: | report |
DOI: | 10.1016/j.sse.2021.108054 |
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