A Cryo-CMOS DAC-based 40-Gb/s PAM4 Wireline Transmitter for Quantum Computing ...
Code Ocean, 2024
academicJournal
Zugriff:
Addressing the advancement toward large-scale quantum computers, this article presents the first 4-level pulse amplitude modulation (PAM4) wireline transmitter operating at cryogenic temperatures (CT). With quantum computers scaling up towards thousands of quantum bits (qubits), but having too limited fidelity for robust operation, continuous rounds of quantum error correction (QEC) are necessary. However, QEC requires a large amount of data to be transferred from a cryogenic controller at 4K to a classical processor at room temperature (RT). To bridge the gap, a high-speed data link between the quantum processor at CT and the classical counterpart at RT is needed. The proposed PAM4 transmitter architecture integrates a low-power 64:4 serializer structure, a high-speed 4:1 current mode logic (CML) multiplexer, and a linear 6-bit digital-to-analog converter. Considering the challenges and benefits of CMOS operating at cryogenic temperatures, the transmitter architecture and circuitry are designed to exploit ...
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A Cryo-CMOS DAC-based 40-Gb/s PAM4 Wireline Transmitter for Quantum Computing ...
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Autor/in / Beteiligte Person: | Fakkel, Niels |
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Veröffentlichung: | Code Ocean, 2024 |
Medientyp: | academicJournal |
DOI: | 10.24433/co.7837097.v1 |
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