Designing Wide-range LDO Circuit Using 180 Nm CMOS Process

This paper presents a Low-dropout regurator (LDO) with wide range input voltage on 180 nm TSMC CMOS process. The LDO circuits in the literature with wide range input voltage use complex circuit architecture, cascode some LDOs with so much power dissipation and area. For this reason, this paper proposes a simple LDO including an added block at input to extend operation range. In addition, to further improve LDO performances, buffer impedance attenuation technique is realized to build an intermediate stage for driving the PMOS pass device. The simulation shows the LDO circuit obtains 3.6 V to 12.6V of input voltage and a low dropout voltage of 300 mV.