Area Efficient Time-shared FIR Filters in Nanoscale CMOS
In: International Conference on Green Circuits and Systems (ICGCS-2010) ; https://hal-centralesupelec.archives-ouvertes.fr/hal-00488822 ; International Conference on Green Circuits and Systems (ICGCS-2010), Jun 2010, Shanghai, China. 6 p, 2010
Konferenz
Zugriff:
International audience ; Parallelism has been used in the past as a high level architectural transformation for reducing the dynamic power consumption of FIR filters. However increasing the level of parallelism incurs an area penalty. In nanoscale CMOS circuits, leakage power is emerging as the dominant mode of power consumption. Leakage power is strongly correlated to the area and the total number of leaking transistors. This requires the classical area vs. power tradeoffs to be revisited. In addition to reducing the dynamic power, the increased timing slacks in the circuits with a higher degree of parallelism, can also be exploited for implementing the circuit using slower, low-leakage transistors. Hence the efficiency with which an architecture can trade area for increased timing slack is an important consideration for low power design in nanoscale CMOS. The current work shows that the algorithmic strength reduction achieved by fast filter algorithms (FFAs) can be used to design a class of time-shared FIR filters which are more area efficient than traditional structures, under specific conditions.
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Area Efficient Time-shared FIR Filters in Nanoscale CMOS
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Autor/in / Beteiligte Person: | Michael, Navin ; Moy, Christophe ; Vinod, A. Prasad ; Palicot, Jacques ; Nanayang Technological University (NTU) ; Institut d'Électronique et des Technologies du numéRique (IETR) ; Université de Nantes (UN)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes) ; Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS) ; Institut d'Electronique et de Télécommunications de Rennes (IETR) ; Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes) ; Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Ecole Supérieure d'Electricité - SUPELEC (FRANCE)-Centre National de la Recherche Scientifique (CNRS) |
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Zeitschrift: | International Conference on Green Circuits and Systems (ICGCS-2010) ; https://hal-centralesupelec.archives-ouvertes.fr/hal-00488822 ; International Conference on Green Circuits and Systems (ICGCS-2010), Jun 2010, Shanghai, China. 6 p, 2010 |
Veröffentlichung: | HAL CCSD, 2010 |
Medientyp: | Konferenz |
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