Gate-engineering-based approach to improve the nanoscale DG MOSFET behavior against interfacial trap effects : Physics and technology of advanced extra functionality CMOS-based devices; Papers presented at the E-MRS spring meeting - symposium K: Physics and technology of advanced extra functionality CMOS-based devices : Strasbourg, France, 27-31 May 2013
In: PHYSICA STATUS SOLIDI C CONFERENCES 11(1):77-80; Jg. 11 (2014) 1, S. 77-80
Konferenz
Zugriff:
Titel: |
Gate-engineering-based approach to improve the nanoscale DG MOSFET behavior against interfacial trap effects : Physics and technology of advanced extra functionality CMOS-based devices; Papers presented at the E-MRS spring meeting - symposium K: Physics and technology of advanced extra functionality CMOS-based devices : Strasbourg, France, 27-31 May 2013
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Autor/in / Beteiligte Person: | Bentrcia, T. ; Djeffal, F. ; Arar, D. ; Dibi, Z. |
Link: | |
Quelle: | PHYSICA STATUS SOLIDI C CONFERENCES 11(1):77-80; Jg. 11 (2014) 1, S. 77-80 |
Veröffentlichung: | 2014 |
Medientyp: | Konferenz |
ISSN: | 1610-1634 (print) |
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