Low-Overhead Triple-Node-Upset-Tolerant Latch Design in 28-nm CMOS
In: IEEE transactions on very large scale integration (VLSI) systems, Jg. 31 (2023), Heft 7, S. 1039-1050
Online
serialPeriodical
Zugriff:
Titel: |
Low-Overhead Triple-Node-Upset-Tolerant Latch Design in 28-nm CMOS
|
---|---|
Autor/in / Beteiligte Person: | Chen, Xin ; Bai, Yuxin ; Cao, Jianpeng ; Wang, Lei ; Zhou, Xinjie ; Zhang, Ying ; Liu, Weiqiang |
Link: | |
Zeitschrift: | IEEE transactions on very large scale integration (VLSI) systems, Jg. 31 (2023), Heft 7, S. 1039-1050 |
Veröffentlichung: | 2023 |
Medientyp: | serialPeriodical |
ISSN: | 1063-8210 (print) |
Sonstiges: |
|