Selective growth of silicon with application to CMOS processing
University of Southampton, 1988
Online
Hochschulschrift
Zugriff:
As a result of the reduction in modern device dimensions, silicon epitaxy has become increasingly important in the fabrication of very large-scale integrated (VLSI) circuits. Advantages arise if the epitaxial layers are grown on selected areas instead of uniformly across the whole slice. Although basic selective epitaxy has been proved possible sometime ago, modern techniques of plasma etching and nitride deposition have greatly enhanced its potential. This is particularly true for CMOS and BICMOS circuits which constitute the most popular processes for volume manufacture at present. This work describes the development and assessment of practical processes capable of realising the potential of selective epitaxy. Compatible dry etching processes have been developed to etch wells in a silicon substrate and to allow an insulating layer to be left selectively on the trench sidewalls. Silicon epitaxy at atmospheric pressure has been investigated with a view to optimising selective silicon growth conditions. Good quality planar silicon was obtained with a minimum of sidewall facet formation previously encountered. The selective epitaxy process developed was then applied to the fabrication of CMOS devices. High performance submicrometer transistors were fabricated and investigated. The latch-up problem was greatly reduced as a result of the 60 times increase in latch-up holding current and the 8 times increase of the latch-up holding voltage, achieved with this technique compared to a conventional process. The results obtained demonstrate the suitability of the selective epitaxy technique for the fabrication of VLSI circuits.
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Selective growth of silicon with application to CMOS processing
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Autor/in / Beteiligte Person: | Hamed, Meloud Mehdi |
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Veröffentlichung: | University of Southampton, 1988 |
Medientyp: | Hochschulschrift |
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