Geometry optimization of TMR current sensors for on-chip iIC testing
In: Selected papers from the international magnetics conference (Intermag 2005), Nagoya, Japan, April 4-8, 2005IEEE transactions on magnetics 41(10):3685-3687
Online
Konferenz
- print, 5 ref
Zugriff:
In this paper, we demonstrate that tunnel magnetoresistive (TMR) elements can be used as sensitive on-chip current sensors in the microampere to milliampere range for current-based IC testing such as power-pin testing and quiescent Idd current (IDDQ) testing. The sensor can be integrated in CMOS ICs containing magnetic random access memory. TMR current sensors with various lateral dimensions (from submicrometer to micrometer) arranged in a Wheatstone bridge have been realized and analyzed. A typical sensitivity of 2.5 (mV/V)/mA and a current resolution of 5.5 μA have been observed. The influence of the sensor geometry on sensor sensitivity, hysteresis, and temperature rise due to Joule heating has been investigated.
Titel: |
Geometry optimization of TMR current sensors for on-chip iIC testing
|
---|---|
Autor/in / Beteiligte Person: | KIM LE, PHAN ; BOEVE, Hans ; VANHELMONT, Frederik ; IKKINK, Ton ; TALEN, Wim |
Link: | |
Quelle: | Selected papers from the international magnetics conference (Intermag 2005), Nagoya, Japan, April 4-8, 2005IEEE transactions on magnetics 41(10):3685-3687 |
Veröffentlichung: | New York, NY: Institute of Electrical and Electronics Engineers, 2005 |
Medientyp: | Konferenz |
Umfang: | print, 5 ref |
ISSN: | 0018-9464 (print) |
Schlagwort: |
|
Sonstiges: |
|