Modelling of the 1T-Bulk capacitor-less DRAM cell with improved performances : The way to scaling
In: 1st International Conference on Memory Technology and Design - ICMTD'05, Giens, May 21-24, 2005Solid-state electronics 49(11):1759-1766
Konferenz
- print, 10 ref
Zugriff:
As capacitor-less DRAM cell appears to be an interesting candidate for future embedded memory generations, we paid particular attention to overall performance and scalability of the IT-Bulk concept. We have analysed this architecture through our analytical model. Then we have fabricated devices and we have measured the influence of different technological parameters: floating body doping level, gate length and gate oxide thickness. The IT-Bulk cell is demonstrated to be a promising candidate for eDRAM applications up to the 45 nm technological node.
Titel: |
Modelling of the 1T-Bulk capacitor-less DRAM cell with improved performances : The way to scaling
|
---|---|
Autor/in / Beteiligte Person: | RANICA, R ; VILLARET, A ; MALINGE, P ; CANDELIER, P ; MASSON, P ; BOUCHAKOUR, R ; MAZOYER, P ; SKOTNICKI, T |
Link: | |
Quelle: | 1st International Conference on Memory Technology and Design - ICMTD'05, Giens, May 21-24, 2005Solid-state electronics 49(11):1759-1766 |
Veröffentlichung: | Oxford: Elsevier Science, 2005 |
Medientyp: | Konferenz |
Umfang: | print, 10 ref |
ISSN: | 0038-1101 (print) |
Schlagwort: |
|
Sonstiges: |
|