Interconnect capacitance characterization using charge-injection-induced error-free (CIEF) charge-based capacitance measurement (CBCM)
In: IEEE transactions on semiconductor manufacturing 19(1):50-56; Jg. 19 (2006) 1, S. 50-56
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Zugriff:
In this work, we describe a novel operation of charge-injection-induced error-free charge-based capacitance measurement (CIEF CBCM) method. This method has the simplest test structure among various CBCM methods by using only one N/PMOS pair. CIEF CBCM has the advantage of being free from charge-injection-induced errors and of efficient layout area usage. It is very suitable for industrial applications for large amounts of accurate capacitance characterizations with a limited layout area. Besides, CIEF CBCM is also implemented for investigating the impact of floating dummy metal fills on interconnect capacitance directly from silicon data.
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Interconnect capacitance characterization using charge-injection-induced error-free (CIEF) charge-based capacitance measurement (CBCM)
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Autor/in / Beteiligte Person: | CHANG, Yao-Wen ; CHANG, Hsin-Wen ; LU, Tao-Cheng ; KING, Ya-Chin ; WENCHI, TING ; KU, Yen-Hui Joseph ; LU, Chih-Yuan |
Link: | |
Quelle: | IEEE transactions on semiconductor manufacturing 19(1):50-56; Jg. 19 (2006) 1, S. 50-56 |
Veröffentlichung: | New York, NY: Institute of Electrical and Electronics Engineers, 2006 |
Medientyp: | Konferenz |
Umfang: | print, 13 ref |
ISSN: | 0894-6507 (print) |
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