Novel 2-D RESURF LDMOSFET in 0.6μm CMOS technology for power ICs
In: 2004 24th internationcal conference on microelectronics (Nis, Serbia and Montenegro, 16-19 May 20), 2004
Konferenz
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Zugriff:
A 0.6um CMOS process was adapted to incorporate LDMOS transistors for Power Integrated Circuit Applications. The design was realised by adding only three additional ion implants process steps and one extra masking process step providing a cost effective approach. The design was optimised prior to manufacture by the Avanti TCAD simulation tool. Physical results show good agreement with the simulated device and display 2-D RESURF action.
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Novel 2-D RESURF LDMOSFET in 0.6μm CMOS technology for power ICs
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Autor/in / Beteiligte Person: | HOLLAND, P. M ; STARKE, T. K. H ; HUSSAIN, S ; JAMAL, W. M ; MAWBY, P. A ; IGIC, P. M |
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Zeitschrift: | 2004 24th internationcal conference on microelectronics (Nis, Serbia and Montenegro, 16-19 May 20), 2004 |
Veröffentlichung: | Piscataway NJ: IEEE, 2004 |
Medientyp: | Konferenz |
Umfang: | print, 10 ref 2 |
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