A highly integrated CMOS analog baseband transceiver with 180 MSOS 13-bit pipelined CMOS ADC and dual 12-bit DACs
In: 2005 Custom Integrated Circuits ConferenceIEEE journal of solid-state circuits 41(8):1856-1866; Jg. 41 (2006) 8, S. 1856-1866
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Zugriff:
A CMOS analog baseband transceiver with a 13-bit, 180 MSPS pipelined ADC and dual 12-bit, 180 MSPS current-steering DACs is presented. The ADC is implemented without a dedicated track-and-hold stage, utilizes a front-end 2.5-bit stage with matched MDAC/comparator tracking circuits, and demonstrates an ENOB of 10.6 bits at 15 MHz and 9.7 bits at 100 MHz, employing a low-jitter delay-lock loop for its phasing. The dual I/Q DACs show over 62 dB SFDR over the Nyquist band by utilizing a dynamic linearity enhancing architecture.
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A highly integrated CMOS analog baseband transceiver with 180 MSOS 13-bit pipelined CMOS ADC and dual 12-bit DACs
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Autor/in / Beteiligte Person: | GULATI, Kush ; MARK SHANE, PENG ; PULINCHERRY, Anurag ; MUNOZ, Carlos E ; LUGIN, Mike ; BUGEJA, Alex R ; JIPENG, LI ; CHANDRAKASAN, Anantha P |
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Quelle: | 2005 Custom Integrated Circuits ConferenceIEEE journal of solid-state circuits 41(8):1856-1866; Jg. 41 (2006) 8, S. 1856-1866 |
Veröffentlichung: | New York, NY: Institute of Electrical and Electronics Engineers, 2006 |
Medientyp: | Konferenz |
Umfang: | print, 18 ref |
ISSN: | 0018-9200 (print) |
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