A 1.9-GHz single-chip CMOS PHS cellphone
In: 2006 IEEE International Solid-State Circuits ConferenceIEEE journal of solid-state circuits 41(12):2737-2745
Online
Konferenz
- print, 20 ref
Zugriff:
A single-chip CMOS PHS cellphone, integrated in a 0.18-μm CMOS technology, implements all handset functions including radio, voice, audio, MODEM, TDMA controller, CPU, and digital interfaces. Both the receiver and transmitter are based on a direct conversion architecture. The RF transceiver achieves -106 dBm receive sensitivity and +4 dBm EVM-compliant transmit power. The local oscillator, based on a sigma-delta fractional-N synthesizer, has a phase noise of - 118 dBc/Hz at 600 kHz offset and settling time of 15 μs. The current consumption for the receiver, transmitter and synthesizer are 32 mA, 29 mA, and 25 mA, respectively, from a 3.0 V supply.
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A 1.9-GHz single-chip CMOS PHS cellphone
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Autor/in / Beteiligte Person: | SI, William W ; MEHTA, Srenik ; SU, David ; WOOLEY, Bruce ; SAMAVATI, Hirad ; TERROVITIS, Manolis ; MACK, Michael ; ONODERA, Keith ; JEN, Steve ; LUSCHAS, Susan ; HWANG, Justin ; MENDIS, Suni |
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Quelle: | 2006 IEEE International Solid-State Circuits ConferenceIEEE journal of solid-state circuits 41(12):2737-2745 |
Veröffentlichung: | New York, NY: Institute of Electrical and Electronics Engineers, 2006 |
Medientyp: | Konferenz |
Umfang: | print, 20 ref |
ISSN: | 0018-9200 (print) |
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