Analytical estimation of propagation delay and short-circuit power dissipation in CMOS gates
In: International journal of circuit theory and applications, Jg. 27 (1999), Heft 4, S. 375-392
Online
academicJournal
- print, 22 ref
Zugriff:
An efficient analytical method for calculating the propagation delay and the short-circuit power dissipation of CMOS gates is introduced in this paper. Key factors that determine the operation of a gate, such as the different modes of operation of serially connected transistors, the starting point of conduction, the parasitic behaviour of the short-circuiting block of a gate and the behaviour of parallel transistor structures are analysed and properly modelled. The analysis is performed taking into account second-order effects of short-channel devices and for non-zero transition time inputs. Analytical expressions for the output waveform, the propagation delay and the short-circuit power dissipation are obtained by solving the differential equations that govern the operation of the gate. The calculated results are in excellent agreement with SPICE simulations.
Titel: |
Analytical estimation of propagation delay and short-circuit power dissipation in CMOS gates
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Autor/in / Beteiligte Person: | NIKOLAIDIS, S ; CHATZIGEORGIOU, A |
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Zeitschrift: | International journal of circuit theory and applications, Jg. 27 (1999), Heft 4, S. 375-392 |
Veröffentlichung: | Chichester; New York, NY: Wiley, 1999 |
Medientyp: | academicJournal |
Umfang: | print, 22 ref |
ISSN: | 0098-9886 (print) |
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