Current monitoring circuit for fault detection in CMOS integrated circuit
In: International journal of electronics, Jg. 95 (2008), Heft 8-10, S. 999-1007
academicJournal
- print, 1/2 p
Zugriff:
This article presents a built-in current sensor (BICS), which detects faults using the current testing technique in CMOS integrated circuits. This circuit employs crosscoupled PMOS transistors, which are used as current comparators. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT). In addition, no extra power dissipation and high-speed fault detection are achieved. It can be applied to deep sub-micron processes. The validity and effectiveness are verified through the HSPICE simulation on circuits with faults. The entire area of the test chip is 116 x 65 μm2. The BICS occupies only 41 × 17 μm2 of the area of the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix 0.35 μm 2-poly-4-metal N-well CMOS process.
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Current monitoring circuit for fault detection in CMOS integrated circuit
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Autor/in / Beteiligte Person: | JEONG BEOM, KIM |
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Zeitschrift: | International journal of electronics, Jg. 95 (2008), Heft 8-10, S. 999-1007 |
Veröffentlichung: | London: Taylor & Francis, 2008 |
Medientyp: | academicJournal |
Umfang: | print, 1/2 p |
ISSN: | 0020-7217 (print) |
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