Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS process
In: Microelectronics and reliability, Jg. 51 (2011), Heft 5, S. 871-878
academicJournal
- print, 24 ref
Zugriff:
A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide reliability problem in low-voltage CMOS process. The four-phase clocks were used to control the charge-transfer devices turning on and turning off alternately to suppress the return-back leakage current. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage to drive a capacitive output load, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current and without suffering gate-oxide overstress problem, the new proposed charge pump circuit is suitable for applications in low-voltage CMOS IC products.
Titel: |
Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS process
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Autor/in / Beteiligte Person: | WENG, Yi-Hsin ; TSAI, Hui-Wen ; KER, Ming-Dou |
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Zeitschrift: | Microelectronics and reliability, Jg. 51 (2011), Heft 5, S. 871-878 |
Veröffentlichung: | Kidlington: Elsevier, 2011 |
Medientyp: | academicJournal |
Umfang: | print, 24 ref |
ISSN: | 0026-2714 (print) |
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