Novel 2-Bit/Cell Wrapped-Select-Gate SONOS TFT Memory Using Source-Side Injection for NOR-Type Flash Array
In: IEEE electron device letters, Jg. 33 (2012), Heft 6, S. 839-841
Online
academicJournal
- print, 11 ref
Zugriff:
This letter is the first to successfully demonstrate the 2-bit/cell wrapped-selected-gate (WSG) SONOS thin-film transistor (TFT) memory using source-side injection (SSI). Because of the higher programming efficiency of SSI, a memory window of approximately 3 V can be easily achieved in 10 μs and 30 ms for the program and erase modes, respectively. In addition, we performed an excellent 2-bit/cell distinguish margin for 3-V memory window in WSG-SONOS TFT memory. The optimal reliability of the endurance and data retention tests can be executed by adjusting the applied voltage appropriately.
Titel: |
Novel 2-Bit/Cell Wrapped-Select-Gate SONOS TFT Memory Using Source-Side Injection for NOR-Type Flash Array
|
---|---|
Autor/in / Beteiligte Person: | WANG, Kuan-Ti ; HSUEH, Fang-Chang ; LU, Yu-Lun ; CHIANG, Tsung-Yu ; WU, Yi-Hong ; LIAO, Chia-Chun ; YEN, Li-Chen ; CHAO, Tien-Sheng |
Link: | |
Zeitschrift: | IEEE electron device letters, Jg. 33 (2012), Heft 6, S. 839-841 |
Veröffentlichung: | New York, NY: Institute of Electrical and Electronics Engineers, 2012 |
Medientyp: | academicJournal |
Umfang: | print, 11 ref |
ISSN: | 0741-3106 (print) |
Schlagwort: |
|
Sonstiges: |
|