28-nm 2T High-K Metal Gate Embedded RRAM With Fully Compatible CMOS Logic Processes
In: IEEE electron device letters, Jg. 34 (2013), Heft 10, S. 1253-1255
Online
academicJournal
- print, 12 ref
Zugriff:
A new two-transistor embedded resistive RAM (RRAM) cell with fully Taiwan Semiconductor Manufacturing Company 28-nm CMOS logic compatible process is reported. The new 28-nm logic compatible RRAM cell consists of two logic standard high-k metal gate (HKMG) CMOS transistors with a composite resistive gate dielectric of TiN/HfO2/SiO2/Si as a resistive memory storage node. Using one of the transistor gates as a source line in RRAM SET/RESET operation, the resistive memory states can be efficiently read and sensed by selecting the other transistor gate and its corresponding bitline. Therefore, the new 2T embedded RRAM cell has realized a logic nonvolatile memory (NVM) solution with cost effective, and fully compatible with 28-nm HKMG CMOS logic platforms. Besides, through adapting the existing high-K gate dielectric in the RRAM cell, the embedded memory cell does not need any additional deposition of resistive film or extra process steps and it will be very scalable and compatible with the fast progress of CMOS technologies in embedded NVM applications. Furthermore, its low voltage requirement makes this cell conveniently fit in logic intellectual properties and circuits for local data storages or level trimming devices on system-on-chip logic NVM products.
Titel: |
28-nm 2T High-K Metal Gate Embedded RRAM With Fully Compatible CMOS Logic Processes
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Autor/in / Beteiligte Person: | CHIN YU, MEI ; WEN CHAO, SHEN ; CHUN HSIUNG, WU ; CHIH, Yue-Der ; KING, Ya-Chin ; CHRONG JUNG, LIN ; TSAI, Ming-Jinn ; TSAI, Kan-Hsueh ; CHEN, Frederick T |
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Zeitschrift: | IEEE electron device letters, Jg. 34 (2013), Heft 10, S. 1253-1255 |
Veröffentlichung: | New York, NY: Institute of Electrical and Electronics Engineers, 2013 |
Medientyp: | academicJournal |
Umfang: | print, 12 ref |
ISSN: | 0741-3106 (print) |
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