FLC-EDC: A Fast Low-Cost Error Detection and Correction Scheme for AVFS System Based on Flip-Flops Resampling in 28-nm CMOS.
In: IEEE Trans. Circuits Syst. II Express Briefs, Jg. 71 (2024), Heft 1, S. 390-394
academicJournal
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Titel: |
FLC-EDC: A Fast Low-Cost Error Detection and Correction Scheme for AVFS System Based on Flip-Flops Resampling in 28-nm CMOS.
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Autor/in / Beteiligte Person: | Cui, Yuqiang ; Deng, Lishuo ; Li, Keran ; Shan, Weiwei |
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Zeitschrift: | IEEE Trans. Circuits Syst. II Express Briefs, Jg. 71 (2024), Heft 1, S. 390-394 |
Veröffentlichung: | 2024 |
Medientyp: | academicJournal |
DOI: | 10.1109/TCSII.2023.3307401 |
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