Power Integrity Analysis for High Current Digital Core & DDR Power and PDN Noise Impact on the LpDDR4 Timing Analysis for ADAS Automotive Application
In: IEEE 27th Workshop on Signal and Power Integrity (SPI); (2023-05-07) S. 1-4
Konferenz
Zugriff:
Titel: |
Power Integrity Analysis for High Current Digital Core & DDR Power and PDN Noise Impact on the LpDDR4 Timing Analysis for ADAS Automotive Application
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Autor/in / Beteiligte Person: | Manoharan, Harini ; Ebert, Frank |
Quelle: | IEEE 27th Workshop on Signal and Power Integrity (SPI); (2023-05-07) S. 1-4 |
Veröffentlichung: | 2023 |
Medientyp: | Konferenz |
ISBN: | 979-8-3503-3282-7 (print) |
ISSN: | 2835-0898 (print) |
DOI: | 10.1109/SPI57109.2023.10145552 |
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