A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS
In: IEEE Journal of Solid-State Circuits, Jg. 58 (2023-11-01), Heft 11, S. 3179-3193
Online
academicJournal
Zugriff:
Titel: |
A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS
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Autor/in / Beteiligte Person: | Zhang, C. ; Wei, J. ; Chen, Y. ; Liu, M. ; Yang, Y. |
Link: | |
Zeitschrift: | IEEE Journal of Solid-State Circuits, Jg. 58 (2023-11-01), Heft 11, S. 3179-3193 |
Veröffentlichung: | 2023 |
Medientyp: | academicJournal |
ISSN: | 0018-9200 (print) ; 1558-173X (print) |
DOI: | 10.1109/JSSC.2023.3282412 |
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