Design Of Low Area Interconnect Architecture for CPU-GPU Network-On-Chips (NoCs)
In: IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT); (2023-07-14) S. 1-5
Konferenz
Zugriff:
Titel: |
Design Of Low Area Interconnect Architecture for CPU-GPU Network-On-Chips (NoCs)
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Autor/in / Beteiligte Person: | Nithya, N. ; Itapu, Srikanth |
Quelle: | IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT); (2023-07-14) S. 1-5 |
Veröffentlichung: | 2023 |
Medientyp: | Konferenz |
ISBN: | 979-8-3503-3439-5 (print) |
ISSN: | 2766-2101 (print) |
DOI: | 10.1109/CONECCT57959.2023.10234778 |
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